Connecting talent with opportunity

Loading WeHireYou

Free for the first 200 users

Claim spot

Design Verification Engineer

Xilinx · · Hybrid

engineeringhybridseniorc++
schedule

Posted

Today

work

Job type

Full-time

domain

Industry

IT & Software

group

Openings

1

About the role

Design Verification Engineer WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: It is a must that the candidate has one or more of the following experience/knowledge, such as IP or SOC verification methodology, formal verification, emulation, GPU architecture, X86/ARM architecture, PCIe(6.0/5.0/4.0 etc) bus, AXI/ACE bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, GDDR(6/7)/LPDDR(4/5) system, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc. THE PERSON: The candidate is expected to exhibit good verbal and written communication skills in English, specialized knowledge plus broad technical knowledge that facilitates integrative thinking, driving execution of quality and timely result, capability to solve complex, novel and no-recurring problems and decision-making on critical technical areas. KEY RESPONSIBILITIES: Work with global IP and SOC design team for large scale SOC chip verification and emulation implementation. Focus on SOC feature verification, emulation model development, FW/SW verification, performance, and power analysis etc. Responsible for multiple aspects in verification areas and provide technical leadership to the engineering team. Accountable for project delivery. PREFERRED EXPERIENCE: Good verbal and written communication skills in English GPU or large SOC verification/validation experiences is a plus RTL coding with Verilog/System Verilog and familiar with C/C++ programming Use of Mentor’s/Synopsys’ Veloce/Zebu emulator Familiar with Unix/Linux environment and good at scripts Understand the architecture of the chip and functional block being designed Build C/C++ model for simulation Build test bench and monitors for DUT using UVM, SV language Compose test plan and validation vectors to ensure functional completeness Debug function/performance bugs of graphics chips Familiar with emulation Environment (including Zebu and Veloce platform and tools) Experience with design for verification (assertion-based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.) Should be versatile in any one of the high level verification flow such as SV,VMM,VERA,OVM etc as well as knowledge of industry standard tools for verification Should have excellent communication skills (both written and oral) Strong problem-solving skills ACADEMIC CREDENTIALS: Major in EE, CS or related, master’s degree with 5+ years working experiences or bachelor’s with 7+ years working experiences. LOCATION: Shanghai #LI-VC1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Key responsibilities

  • check_circleCollaborate with the team on day-to-day project tasks
  • check_circleLearn tools and processes used by the organization
  • check_circleDocument work and participate in team meetings
  • check_circleSupport quality checks and continuous improvement

Requirements

  • check_circleRelevant education or self-taught skills for the role
  • check_circleStrong willingness to learn and take feedback
  • check_circleGood communication in English (written and verbal)
  • check_circleAbility to commit to the internship/role duration

Skills & keywords

c++designengineerverificationxilinx

Benefits & perks

  • check_circleMentorship
  • check_circleCertificate of completion
  • check_circleFlexible work arrangement where applicable